Earlier this year, the news spread that Samsung is struggling to develop its 3nm node based on coolet technology, leakage current was already mentioned as the main reason. The manufacturer has announced at its Foundry Forum that this technology-based 3nm node will go into production in the first half of 2022.

What writes EE Times, who attended the conference. Gaafet means door fetish, so the gate completely surrounds the transistor. It is difficult to obtain high enough yields for this technique. Now Samsung has revealed that the technology should enable 35% higher transistor density, along with 30% more performance or 50% less power consumption compared to the previous 5nm process. Gaafet offers more options for determining the height and width of the fins compared to finfet, making smaller doors possible.

Furthermore, Samsung claimed that 14nm and 17nm nodes are also being developed. The 17 nm node combines a front line end at 14 nm and a back line end at 28 nm to form an intermediate passage between the two nodes. There is also talk of ‘microbumps’ (holes in the chips to connect them together), hybrid link and ‘3.5D designs’ with multiple chips stacked in an interleaver.

EE Times


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